AMD · CPU
AMD EPYC 9825
AMD EPYC 9825 — Specifications and benchmarks. .
These specifications are supported by the linked sources. Core counts, clocks and memory capacities do not predict workload performance. Check benchmark versions, environments and sample counts.
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Power
| Parameter | Value and conditions |
|---|---|
| TDP | 390 W Source and conditions{
"state": "known",
"raw_label": "Default TDP",
"raw_value": "390W",
"qualifiers": {
"release_evidence": "dated-manufacturer-listing",
"source_field": "Default TDP",
"source_product_url": "https://www.amd.com/en/products/processors/server/epyc/9005-series/amd-epyc-9825.html",
"source_row": 34
},
"document_id": "amd-server-table-ba5dc2e1f3f72b71"
}390 W Source and conditions{
"state": "known",
"raw_label": "Default TDP",
"raw_value": "390W",
"qualifiers": {
"source_field": "Default TDP",
"source_row": 1
},
"document_id": "detail-77d67f348a67cdc1-e9b50c06468fb033"
} |
Compute
| Parameter | Value and conditions |
|---|---|
| Base clock | 2,200 MHz Source and conditions{
"state": "known",
"raw_label": "Base Clock",
"raw_value": "2.2 GHz",
"qualifiers": {
"release_evidence": "dated-manufacturer-listing",
"source_field": "Base Clock",
"source_product_url": "https://www.amd.com/en/products/processors/server/epyc/9005-series/amd-epyc-9825.html",
"source_row": 34
},
"document_id": "amd-server-table-ba5dc2e1f3f72b71"
}2,200 MHz Source and conditions{
"state": "known",
"raw_label": "Base Clock",
"raw_value": "2.2 GHz",
"qualifiers": {
"source_field": "Base Clock",
"source_row": 1
},
"document_id": "detail-77d67f348a67cdc1-e9b50c06468fb033"
} |
| Max boost clock | 3,700 MHz Source and conditions{
"state": "known",
"raw_label": "Max. Boost Clock",
"raw_value": "Up to 3.7 GHz",
"qualifiers": {
"release_evidence": "dated-manufacturer-listing",
"source_field": "Max. Boost Clock",
"source_product_url": "https://www.amd.com/en/products/processors/server/epyc/9005-series/amd-epyc-9825.html",
"source_row": 34
},
"document_id": "amd-server-table-ba5dc2e1f3f72b71"
}3,700 MHz Source and conditions{
"state": "known",
"raw_label": "Max. Boost Clock",
"raw_value": "Up to 3.7 GHz",
"qualifiers": {
"source_field": "Max. Boost Clock",
"source_row": 1
},
"document_id": "detail-77d67f348a67cdc1-e9b50c06468fb033"
} |
| CPU cores | 144 Source and conditions{
"state": "known",
"raw_label": "# of CPU Cores",
"raw_value": "144",
"qualifiers": {
"release_evidence": "dated-manufacturer-listing",
"source_field": "# of CPU Cores",
"source_product_url": "https://www.amd.com/en/products/processors/server/epyc/9005-series/amd-epyc-9825.html",
"source_row": 34
},
"document_id": "amd-server-table-ba5dc2e1f3f72b71"
}144 Source and conditions{
"state": "known",
"raw_label": "# of CPU Cores",
"raw_value": "144",
"qualifiers": {
"source_field": "# of CPU Cores",
"source_row": 1
},
"document_id": "detail-77d67f348a67cdc1-e9b50c06468fb033"
} |
| threads | 288 Source and conditions{
"state": "known",
"raw_label": "# of Threads",
"raw_value": "288",
"qualifiers": {
"release_evidence": "dated-manufacturer-listing",
"source_field": "# of Threads",
"source_product_url": "https://www.amd.com/en/products/processors/server/epyc/9005-series/amd-epyc-9825.html",
"source_row": 34
},
"document_id": "amd-server-table-ba5dc2e1f3f72b71"
}288 Source and conditions{
"state": "known",
"raw_label": "# of Threads",
"raw_value": "288",
"qualifiers": {
"source_field": "# of Threads",
"source_row": 1
},
"document_id": "detail-77d67f348a67cdc1-e9b50c06468fb033"
} |
Memory
| Parameter | Value and conditions |
|---|---|
| L3 cache | 384 MB Source and conditions{
"state": "known",
"raw_label": "L3 Cache",
"raw_value": "384 MB",
"qualifiers": {
"release_evidence": "dated-manufacturer-listing",
"source_field": "L3 Cache",
"source_product_url": "https://www.amd.com/en/products/processors/server/epyc/9005-series/amd-epyc-9825.html",
"source_row": 34
},
"document_id": "amd-server-table-ba5dc2e1f3f72b71"
}384 MB Source and conditions{
"state": "known",
"raw_label": "L3 Cache",
"raw_value": "384 MB",
"qualifiers": {
"source_field": "L3 Cache",
"source_row": 1
},
"document_id": "detail-77d67f348a67cdc1-e9b50c06468fb033"
} |
| Max capacity by memory type | 1 DIMM/channel: 6 TB per processor at 6000 MT/s; 2 DIMMs/channel: 12 TB at 4000 MT/s (AMD 58471 rev. 1.0). Other AMD documents disagree; confirm validated DIMMs and BIOS with the system vendor. Source and conditions{
"state": "known",
"raw_label": "Conditional maximum supported memory",
"raw_value": "1 DIMM/channel: 6 TB per processor at 6000 MT/s; 2 DIMMs/channel: 12 TB at 4000 MT/s (AMD 58471 rev. 1.0). Other AMD documents disagree; confirm validated DIMMs and BIOS with the system vendor.",
"qualifiers": {
"capacity_conditions": [
{
"capacity_tb": 6,
"dpc": 1,
"memory_speed_mts": 6000
},
{
"capacity_tb": 12,
"dpc": 2,
"memory_speed_mts": 4000
}
],
"capacity_scope": "per-processor",
"conflicting_source_urls": [
"https://docs.amd.com/api/khub/documents/xG3lMw~fCmrqvz4A0sDWug/content",
"https://www.amd.com/content/dam/amd/en/documents/epyc-business-docs/datasheets/amd-epyc-9005-series-processor-datasheet.pdf",
"https://www.amd.com/en/partner/articles/epyc-9005-series-processors.html"
],
"evidence_checked_at": "2026-10-10T11:39:43.416175+00:00",
"family": "EPYC 9005 Series",
"memory_type": "DDR5",
"not_board_slot_count": true,
"not_installed_ram": true,
"source_conflict": "9005-memory-capacity-conflict",
"source_field": "Conditional maximum supported memory",
"source_revision": "58471rev1.0 October2024",
"source_row": 3,
"source_section": "2.2Memory printed page3",
"source_sha256": "78ab66a6a7b1d5123eebe3e2907ce1ec37e57bbd211834019f5918283b81cd48"
},
"document_id": "reaudit-epyc-9005-conditional-memory-78ab66a6a7b1d512"
} |
| Memory channels | 12 Source and conditions{
"state": "known",
"raw_label": "Memory Channels",
"raw_value": "12",
"qualifiers": {
"release_evidence": "dated-manufacturer-listing",
"source_field": "Memory Channels",
"source_product_url": "https://www.amd.com/en/products/processors/server/epyc/9005-series/amd-epyc-9825.html",
"source_row": 34
},
"document_id": "amd-server-table-ba5dc2e1f3f72b71"
}12 Source and conditions{
"state": "known",
"raw_label": "Memory Channels",
"raw_value": "12",
"qualifiers": {
"source_field": "Memory Channels",
"source_row": 1
},
"document_id": "detail-77d67f348a67cdc1-e9b50c06468fb033"
} |
| Published DIMM populations | 12, 24 Source and conditions{
"state": "known",
"raw_label": "Published DIMM populations",
"raw_value": "12, 24",
"qualifiers": {
"document_section": "9005 architecture and DIMM population",
"scope": "per processor; board layout illustrative",
"source_field": "Published DIMM populations",
"source_row": 3
},
"document_id": "topology-epyc-9005-d7ac928e263a085a"
} |
| Supported RAM module types | RDIMM Source and conditions{
"state": "known",
"raw_label": "System Memory Subtype",
"raw_value": "RDIMM",
"qualifiers": {
"retrieval_method": "reviewed structured extraction from readable primary-source text",
"scope": "9004/9005 SP5 family; RDIMM-3DS is also documented",
"source_field": "System Memory Subtype",
"source_row": 27,
"source_url": "https://www.asrockrack.com/minisite/AMD-EPYC-9005-Server/"
},
"document_id": "topology-epyc-rdimm-948df062512a03d7"
} |
| Memory type | DDR5 Source and conditions{
"state": "known",
"raw_label": "System Memory Type",
"raw_value": "DDR5",
"qualifiers": {
"release_evidence": "dated-manufacturer-listing",
"source_field": "System Memory Type",
"source_product_url": "https://www.amd.com/en/products/processors/server/epyc/9005-series/amd-epyc-9825.html",
"source_row": 34
},
"document_id": "amd-server-table-ba5dc2e1f3f72b71"
}DDR5 Source and conditions{
"state": "known",
"raw_label": "System Memory Type",
"raw_value": "DDR5",
"qualifiers": {
"source_field": "System Memory Type",
"source_row": 1
},
"document_id": "detail-77d67f348a67cdc1-e9b50c06468fb033"
} |
Connectivity and features
| Parameter | Value and conditions |
|---|---|
| Socket | SP5 Source and conditions{
"state": "known",
"raw_label": "CPU Socket",
"raw_value": "SP5",
"qualifiers": {
"document_section": "9005 architecture and DIMM population",
"scope": "per processor; board layout illustrative",
"source_field": "CPU Socket",
"source_row": 3
},
"document_id": "topology-epyc-9005-d7ac928e263a085a"
} |
Public benchmarks
Compare results with matching versions, scenes, settings and statistics. A run count of 0 identifies an aggregate or reported value, not a newly measured run.
No comparable public scores are available. This does not mean a score of zero or poor performance.
Sources
Source terms and retrieval dates are listed below. Published values and conditions may change.
- View source ↗ 2026-10-09
Official AMD DataTables complete row data read in browser; captured source JSON retained
- View source ↗ 2026-10-09
Complete official manufacturer detail/compare table; original HTML retained
- View source ↗ 2026-10-10
Reviewed conflicting official memory claim, preserved as conditional display text; no scalar maximum asserted
- View source ↗ 2026-10-11
Reviewed manufacturer architecture and SKU table; 12/24 DIMM examples are per socket, not actual motherboard slots
- View source ↗ 2026-10-11
Reviewed structured extraction via web.run; original HTTP page was blocked. Board manufacturer explicitly supports EPYC 9004/9005 and DDR5 RDIMM / RDIMM-3DS
- View source ↗ 2026-10-10
Reviewed AMD9005datasheet table; capacity-scope conflict retained as source text
- View source ↗ 2026-10-10
Reviewed AMD9005partner system-capacity table; exact rowmatches only; not a CPUcapacity